Parameterised automated generation of
convolvers implemented
in FPGAs
Ernest Jamro
Supervisor
dr hab. inż. Kazimierz Wiatr, prof. n. AGH
A DISSERATION SUBMITED TO
UNIVERSITY OF MINING AND METALLURGY
DEPARTMENT OF ELECTRONICS
IN FULFILMENT OF THE REQUIREMENTS FOR THE DEGREE OF
DOCTOR OF PHILOSOPHY
Kraków, Poland
June 2001
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Abstract
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Abstract
Silicon technology now allows us to build chips consisting of
tens of millions
of transistors. As a result, more and more projects are constrained by
the
design time and complexity rather than available chip resources. This
thesis
describes a (C++ based) Automated Tool for generation 2-dimentional
Convolvers
(2D FIR filters) implemented in FPGAs (AuToCon). The AuToCon can
automatically
generates a VHDL description of a wide range of convolvers giving the
list
of parameters, such as: an input width, a convolution kernel size,
coefficient
values, a pipelining option, etc.