|
Overview about the different versions of the I2C
bus specification
The very first specification dates back to the year
1982. It only covered Standard mode (up to 100 kbit/s) and 7-bit
addressing. Extensions like Fast Mode, Hs-Mode or 10-bit addressing were
added in later versions.
Version 1.0 - 1992
This version of the 1992 I2C-bus specification
included the following modifications:
- Programming of a slave address by software has
been omitted. The realization of this feature was rather complicated
and had not been used.
- The "low-speed mode" has been omitted.
This mode was, in fact, a subset of the total I2C-bus specification
and did not need to be specified explicitly.
- The Fast-mode was added. This allows a fourfold
increase of the bit rate up to 400 kbit/s. Fast-mode devices are
downwards compatible i.e. they can be used in a 0 to 100 kbit/s
I2C-bus system.
- 10-bit addressing was added. This allows 1024
additional slave addresses.
- Slope control and input filtering FOR FAST-MODE
DEVICES was specified to improve the EMC behavior. NOTE: Neither the
100 kbit/s I2C-bus system nor the 100 kbit/s devices have been
changed.
Version 2.0 - 1998
As the I2C-bus became a de facto world standard
implemented in over 1000 different ICs and licensed to more than 50
companies, an update of the specification became necessary as many of the
newer applications required higher bus speeds and lower supply voltages.
This version 2.0 of the I2C-bus specification met those requirements and
included the following modifications:
- The High-speed mode (Hs-mode) was added. This
allows an increase in the bit rate up to 3.4 Mbit/s. Hs-mode devices
can be mixed with Fast- and Standard-mode devices on the one I2C-bus
system with bit rates from 0 to 3.4 Mbit/s.
- The low output level and hysteresis of devices
with a supply voltage of 2 V and below has been adapted to meet the
required noise margins and to remain compatible with higher supply
voltage devices.
- The 0.6 V at 6 mA requirement for the output
stages of Fast-mode devices has been omitted.
- The fixed input levels for new devices were
replaced by bus voltage-related levels.
- Application information for bi-directional level
shifter was added.
Version 2.1 of the I2C-bus specification is the most
current version. It includes the following minor modifications:
- After a repeated START condition in Hs-mode, it
is possible to stretch the clock signal SCLH.
- Some timing parameters in Hs-mode have been
relaxed.
Back
to I2C Index |
ESAcademy, 2000
All materials
provided 'as is'
see Disclaimer
www.esacademy.com
info@esacademy.com |