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Time to Digital Converters (TDC) have gained increasing importance in recent years because of the widening of applications and of new efficient architectures performing numerical conversion of time intervals. This workshop will be a great opportunity for all participants to exchange ideas, discuss research outcomes and present scientific results about TDC architectures and applications.
NoMe-TDC 2016 is a one-day workshop that will take place in Krakow (Poland) on June 15, 2016.
Robert Bogdan Staszewski

Robert Bogdan StaszewskiUniversity College, Dublin

Keynote at EBCCSP:
It is Time to use Time (for Digital RF Clock Generation)

Abstract: Unlike today when “digital turns into analog” and “analog turns into digital”, back in the late 1990s, the separation between analog and digital was unmistakable and vast. The design techniques, automation flow (or the lack of it), or even the way of designers’ thinking were simply incompatible. Probably the only major area that was blurring these boundaries was a read channel for magnetic recording in hard disk drives. It employed precise continuous-time filtering combined with ultra-high speed discrete time analog signal processing plus sophisticated digital processing. Having been fully immersed in that way of thinking and then moving to an RF group within Texas Instruments has produced an eye-opening experience. The read channel was sampling at 750MS/s and GSM then was only 900MHz so the CMOS technology was becoming fast enough. Why not exploit the digital and sampling techniques to directly digitize the RF signal? Of course doing so blindly would burn too much power to make it practical but why not exploit another idea of magnetic recording: time-domain information? The information has traditionally been encoded as voltage (or sometimes current), but why not use time? This immediately led to the idea of time-to-digital converters (TDC) to solve the pesky problem of phase error filtering in PLLs. When a digitally controlled oscillator (DCO) was added to it, the resulting ADPLL is just the history.
Speaker: R. Bogdan Staszewski received BSEE (summa cum laude), MSEE and PhD from University of Texas at Dallas, USA, in 1991, 1992 and 2002, respectively. From 1991 to 1995 he was with Alcatel in Richardson, Texas. He joined Texas Instruments in Dallas, Texas in 1995. In 1999 he co-started a Digital RF Processor (DRP) group in TI with a mission to invent new digitally intensive approaches to traditional RF functions. Dr. Staszewski served as a CTO of the DRP group between 2007 and 2009. In July 2009 he joined Delft University of Technology in the Netherlands where he is currently a part-time Full Professor. Since Sept. 2014 he is a Professor at University College Dublin (UCD) in Ireland. He has co-authored two books, four book chapters, 200 journal and conference publications, and holds 150 issued US patents. His research interests include nanoscale CMOS architectures and circuits for frequency synthesizers, transmitters and receivers. He is an IEEE Fellow and a recipient of IEEE Circuits and Systems Industrial Pioneer Award (http://ieee-cas.org/about/awards/industrial-pioneer-award).

Previous workshop edition:

NoMe TDC 2013, Perugia, Italy